Ruben Llorach's engine can design chips — and it learns fast

Ruben Llorach is building a creative engine with Claude that can take a chip design and lay out the routing — the wires that connect every pin — all in 2 seconds on a single RTX 5090. The model is only 34M parameters but it learned 3D spatial reasoning from examples. It doesn't need hand-written rules; it learned the geometry, obstacle avoidance, and wire-following by watching examples.

What's striking is that the hard part of chip routing — coordinating hundreds of nets across multiple layers without collisions — is the same problem that makes EDA software cost $50k a year. NVIDIA's internal routing tools run on GPU clusters for hours. His model does a version of it in 2 seconds.

The jump from a demo grid to a real chip is a data problem, not a model problem. The architecture already generalizes — 97.9% token accuracy on the rich dataset proved it. Feed it real chip routing data and it learns real chip routing. If it hits 60–70% full-puzzle connectivity on production-scale netlists, it's not a research curiosity anymore — it's threatening a multi-billion dollar EDA industry.

And here's the loop you can feel: better routing model makes denser, faster chip designs, which makes faster training hardware, which makes a better routing model. The 100M and 200M models ahead aren't just about benchmark numbers. They're about whether the thing actually works at scale.

Why this matters for us: Ruben is proving that a small model can outperform big tools when it learns the geometry directly. That's the kind of thing that shows up in our tools — the aunts and tios who run side businesses don't need a 100GB model; they need something that works now, on their hardware, without waiting for the cloud.